High-Speed Data Acquisition Systems for Particle Detectors
from
Monday, October 17, 2016 (9:00 AM)
to
Friday, October 21, 2016 (1:25 PM)
Monday, October 17, 2016
9:00 AM
Introduction to Data Acquisition Systems
9:00 AM - 9:50 AM
Room: Kursraum 2
9:50 AM
Introduction to FPGAs
9:50 AM - 10:40 AM
Room: Kursraum 2
10:40 AM
Coffee Break
Coffee Break
10:40 AM - 11:05 AM
Room: Foyer
11:05 AM
Introduction to VHDL
11:05 AM - 11:55 AM
Room: Kursraum 2
11:55 AM
Xilinx Vivado Design Suite
11:55 AM - 12:45 PM
Room: Kursraum 2
12:45 PM
Lunch Break
Lunch Break
12:45 PM - 1:45 PM
1:45 PM
FPGA Lab 1
1:45 PM - 3:25 PM
Room: Kursraum 2
3:25 PM
Coffee Break
Coffee Break
3:25 PM - 3:50 PM
Room: Foyer
3:50 PM
FPGA Lab 2
3:50 PM - 5:30 PM
Room: Kursraum 2
Tuesday, October 18, 2016
9:00 AM
Digital Electronics, under the Hood of VHDL
9:00 AM - 10:40 AM
Room: Kursraum 2
10:40 AM
Coffee Break
Coffee Break
10:40 AM - 11:05 AM
Room: Foyer
11:05 AM
Comparison of VHDL and Verilog
11:05 AM - 12:45 PM
Room: Kursraum 2
12:45 PM
Lunch Break
Lunch Break
12:45 PM - 1:45 PM
1:45 PM
FPGA Lab 3
1:45 PM - 3:25 PM
Room: Kursraum 2
3:25 PM
Coffee Break
Coffee Break
3:25 PM - 3:50 PM
Room: Foyer
3:50 PM
FPGA Lab 4
3:50 PM - 5:30 PM
Room: Kursraum 2
Wednesday, October 19, 2016
9:00 AM
Introduction to GPU Architectures
9:00 AM - 9:50 AM
Room: Kursraum 2
9:50 AM
Introduction to Track Reconstruction in High Energy Physics
9:50 AM - 10:40 AM
Room: Kursraum 2
10:40 AM
Coffee Break
Coffee Break
10:40 AM - 11:05 AM
Room: Foyer
11:05 AM
GPU Computing: OpenCL, CUDA
11:05 AM - 11:55 AM
Room: Kursraum 2
11:55 AM
GPU Application Example: Kalman Filter
11:55 AM - 12:45 PM
Room: Kursraum 2
12:45 PM
Lunch Break
Lunch Break
12:45 PM - 1:45 PM
1:45 PM
GPU Lab 1
1:45 PM - 3:25 PM
Room: Kursraum 2
3:25 PM
Coffee Break
Coffee Break
3:25 PM - 3:50 PM
Room: Foyer
3:50 PM
GPU Lab 2
3:50 PM - 5:30 PM
Room: Kursraum 2
Thursday, October 20, 2016
9:00 AM
High-Speed Data Communication
9:00 AM - 10:40 AM
Room: Kursraum 2
10:40 AM
Coffee Break
Coffee Break
10:40 AM - 11:05 AM
Room: Foyer
11:05 AM
FPGA Data Transmission and Reception
11:05 AM - 12:45 PM
Room: Kursraum 2
12:45 PM
Lunch Break
Lunch Break
12:45 PM - 1:45 PM
1:45 PM
FPGA Lab 5
1:45 PM - 3:25 PM
Room: Kursraum 2
3:25 PM
Coffee Break
Coffee Break
3:25 PM - 3:50 PM
Room: Foyer
3:50 PM
FPGA Lab 6
3:50 PM - 5:30 PM
Room: Kursraum 2
6:45 PM
Social Event (Dinner)
Social Event (Dinner)
6:45 PM - 10:30 PM
Friday, October 21, 2016
9:00 AM
Setting up a New Project including FPGAs
9:00 AM - 10:40 AM
Room: Kursraum 2
10:40 AM
Coffee Break
Coffee Break
10:40 AM - 11:05 AM
Room: Foyer
11:05 AM
Demonstration of an Optical Data Transmission System
11:05 AM - 12:45 PM
Room: Kursraum 2