High-Speed Data Acquisition Systems for Particle Detectors
from
Monday 17 October 2016 (09:00)
to
Friday 21 October 2016 (13:25)
Monday 17 October 2016
09:00
Introduction to Data Acquisition Systems
09:00 - 09:50
Room: Kursraum 2
09:50
Introduction to FPGAs
09:50 - 10:40
Room: Kursraum 2
10:40
Coffee Break
Coffee Break
10:40 - 11:05
Room: Foyer
11:05
Introduction to VHDL
11:05 - 11:55
Room: Kursraum 2
11:55
Xilinx Vivado Design Suite
11:55 - 12:45
Room: Kursraum 2
12:45
Lunch Break
Lunch Break
12:45 - 13:45
13:45
FPGA Lab 1
13:45 - 15:25
Room: Kursraum 2
15:25
Coffee Break
Coffee Break
15:25 - 15:50
Room: Foyer
15:50
FPGA Lab 2
15:50 - 17:30
Room: Kursraum 2
Tuesday 18 October 2016
09:00
Digital Electronics, under the Hood of VHDL
09:00 - 10:40
Room: Kursraum 2
10:40
Coffee Break
Coffee Break
10:40 - 11:05
Room: Foyer
11:05
Comparison of VHDL and Verilog
11:05 - 12:45
Room: Kursraum 2
12:45
Lunch Break
Lunch Break
12:45 - 13:45
13:45
FPGA Lab 3
13:45 - 15:25
Room: Kursraum 2
15:25
Coffee Break
Coffee Break
15:25 - 15:50
Room: Foyer
15:50
FPGA Lab 4
15:50 - 17:30
Room: Kursraum 2
Wednesday 19 October 2016
09:00
Introduction to GPU Architectures
09:00 - 09:50
Room: Kursraum 2
09:50
Introduction to Track Reconstruction in High Energy Physics
09:50 - 10:40
Room: Kursraum 2
10:40
Coffee Break
Coffee Break
10:40 - 11:05
Room: Foyer
11:05
GPU Computing: OpenCL, CUDA
11:05 - 11:55
Room: Kursraum 2
11:55
GPU Application Example: Kalman Filter
11:55 - 12:45
Room: Kursraum 2
12:45
Lunch Break
Lunch Break
12:45 - 13:45
13:45
GPU Lab 1
13:45 - 15:25
Room: Kursraum 2
15:25
Coffee Break
Coffee Break
15:25 - 15:50
Room: Foyer
15:50
GPU Lab 2
15:50 - 17:30
Room: Kursraum 2
Thursday 20 October 2016
09:00
High-Speed Data Communication
09:00 - 10:40
Room: Kursraum 2
10:40
Coffee Break
Coffee Break
10:40 - 11:05
Room: Foyer
11:05
FPGA Data Transmission and Reception
11:05 - 12:45
Room: Kursraum 2
12:45
Lunch Break
Lunch Break
12:45 - 13:45
13:45
FPGA Lab 5
13:45 - 15:25
Room: Kursraum 2
15:25
Coffee Break
Coffee Break
15:25 - 15:50
Room: Foyer
15:50
FPGA Lab 6
15:50 - 17:30
Room: Kursraum 2
18:45
Social Event (Dinner)
Social Event (Dinner)
18:45 - 22:30
Friday 21 October 2016
09:00
Setting up a New Project including FPGAs
09:00 - 10:40
Room: Kursraum 2
10:40
Coffee Break
Coffee Break
10:40 - 11:05
Room: Foyer
11:05
Demonstration of an Optical Data Transmission System
11:05 - 12:45
Room: Kursraum 2