High-Speed Data Acquisition Systems for Particle Detectors

17 Oct 2016, 09:00 → 21 Oct 2016, 13:25 Europe/Berlin

Kursraum 2 (Zentrum für Datenverarbeitung, JGU Mainz)

The School addresses to master students, Ph.D. students, and postdoctoral researchers in physics aiming to work with data acquisition systems (DAQ). It will introduce typical concepts and designs of DAQs and associated electronics enabling the handling of high data rates, preserving relevant signal information, or making smart trigger decisions.

Morning sessions will consist of lectures, which cover the fundamentals and prepare for the afternoon laboratories. Working in small groups, the participants will get acquainted with the subjects through practical exercises: FPGA and GPU programming, circuit simulation and system design.

Poster Poster_PRISMA_School_2016.pdf

Monday 17 October

09:00 → 09:50 Introduction to Data Acquisition Systems

Convener: Marc Weber (KIT)

09:50 → 10:40 Introduction to FPGAs

digital logic, history, FPGA architecture, current trends, design methodology

Convener: Ulrich Schäfer (JGU)

10:40 → 11:05 Coffee Break

11:05 → 11:55 Introduction to VHDL

hardware description languages, VHDL, concurrent and sequential code, inferring hardware components

Convener: Quirin Weitzel (PRISMA Detector Lab)

11:55 → 12:45 Xilinx Vivado Design Suite

design flow, Tcl scripting language, logic simulation, IP cores, verification and debugging

Convener: Quirin Weitzel (PRISMA Detector Lab)

12:45 → 13:45 Lunch Break

13:45 → 15:25 FPGA Lab 1

FPGA hardware and board presentation, clock generation and distribution

Convener: Andrea Brogna (PRISMA Detektorlabor)

15:25 → 15:50 Coffee Break

15:50 → 17:30 FPGA Lab 2

display drivers and multiplexers

Convener: Andrea Brogna (PRISMA Detektorlabor)

Tuesday 18 October

09:00 → 10:40 Digital Electronics, under the Hood of VHDL

digital systems, logic functions, elementary gates, combinatorial logic, sequential logic, synchronous logic, finite state machines, registers, shift registers

Convener: Andrea Brogna (PRISMA Detektorlabor)

10:40 → 11:05 Coffee Break

11:05 → 12:45 Comparison of VHDL and Verilog

comparison of the hardware description languages VHDL and Verilog

Convener: Fridtjof Feldbusch (KIT)

12:45 → 13:45 Lunch Break

13:45 → 15:25 FPGA Lab 3

binary counters, encoders, trigger circuits and event capture

Convener: Andrea Brogna (PRISMA Detektorlabor)

15:25 → 15:50 Coffee Break

15:50 → 17:30 FPGA Lab 4

state machines

Convener: Andrea Brogna (PRISMA Detektorlabor)

Wednesday 19 October

09:00 → 09:50 Introduction to GPU Architectures

Convener: Dorothea vom Bruch (JGU)

09:50 → 10:40 Introduction to Track Reconstruction in High Energy Physics

Convener: David Rohr (Uni Frankfurt)

10:40 → 11:05 Coffee Break

11:05 → 11:55 GPU Computing: OpenCL, CUDA

Conveners: David Rohr (Uni Frankfurt), Dorothea vom Bruch (JGU)

11:55 → 12:45 GPU Application Example: Kalman Filter

Convener: David Rohr (Uni Frankfurt)

12:45 → 13:45 Lunch Break

13:45 → 15:25 GPU Lab 1

introductory exercises

Conveners: David Rohr (Uni Frankfurt), Dorothea vom Bruch (JGU)

15:25 → 15:50 Coffee Break

15:50 → 17:30 GPU Lab 2

Kalman filter implementation on GPU

Conveners: David Rohr (Uni Frankfurt), Dorothea vom Bruch (JGU)

Thursday 20 October

09:00 → 10:40 High-Speed Data Communication

communication systems and signals, transmitters and receivers, cables and impedance matching, optical fibers, lasers, modulation

Convener: Andrea Brogna (PRISMA Detektorlabor)

10:40 → 11:05 Coffee Break

11:05 → 12:45 FPGA Data Transmission and Reception

I/O hardware components, data sampling, data encoding for error detection and checksums, bit error rate tester

Convener: Christian Kahra (PRISMA Detektorlabor)

12:45 → 13:45 Lunch Break

13:45 → 15:25 FPGA Lab 5

board-to-board communication, bit error rate tester

Conveners: Christian Kahra (PRISMA Detektorlabor), Quirin Weitzel (PRISMA Detector Lab)

15:25 → 15:50 Coffee Break

15:50 → 17:30 FPGA Lab 6

behavioral simulation with Vivado

Convener: Quirin Weitzel (PRISMA Detector Lab)

18:45 → 22:30 Social Event (Dinner)

Friday 21 October

09:00 → 10:40 Setting up a New Project including FPGAs

new Vivado project, constraints file, I/O planning, I/O banks and assignments, floorplan, timing constraints, implementation strategies, PCB design recommendations, wall clock example

Conveners: Andrea Brogna (PRISMA Detektorlabor), Christian Kahra (PRISMA Detektorlabor)

10:40 → 11:05 Coffee Break

11:05 → 12:45 Demonstration of an Optical Data Transmission System

Convener: Christian Kahra (PRISMA Detektorlabor)